Expand description

This crate defines a framebuffer compositor.

A framebuffer compositor composites a list of framebuffers into a single destination framebuffer. The coordinate system within a framebuffer is expressed relative to its origin, i.e., the top-left point.

Cache

The compositor caches groups of framebuffer rows for better performance.

First, it divides each framebuffer into ranges of rows called “blocks” which are CACHE_BLOCK_HEIGHT rows in height, and deals with these row ranges one by one. The pixels in each block’s row range are a contiguous array of length CACHE_BLOCK_HEIGHT * framebuffer_width, and the cache key is the hash value of that pixel array.

In the next step, for every CACHE_BLOCK_HEIGHT rows, the compositor checks if the pixel array is are already cached. It ignores row ranges that do not overlap with the given bounding box to be updated. If a pixel array is not cached, the compositor will refresh the pixels within the bounding box and cache those CACHE_BLOCK_HEIGHT rows.

In order to cache a range of rows from the source framebuffer, the compositor needs to cache its contents, its location in the destination framebuffer, and its size. The cache is basically a rectangular region in the destination framebuffer, and we define the structure CacheBlock to represent that cached region.

Structs

  • A CacheBlock represents the cached (previously-composited) content of a range of rows in the source framebuffer. It specifies the rectangular region in the destination framebuffer and the hash. Once cached, a CacheBlock block is independent of the source framebuffer it came from. content_hash is the hash value of the actual pixel contents in the cached block. A cache block is identical to some new framebuffer rows to be updated if they share the same content_hash, location and width.
  • The framebuffer compositor structure. It caches framebuffer rows since last update as soft states for better performance.

Constants

  • The height of a cache block. In every iteration the compositor will deal with groups of 16 rows and cache them.

Statics